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ProtoCore v0.0.1
Deterministic, zero-heap network stack for embedded targets
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8 MB PSRAM profile - scale the RAM-backed pools up past the chip's internal SRAM. More...
Go to the source code of this file.
Macros | |
| #define | PC_TLS_ARENA_IN_PSRAM 1 |
| #define | PC_H2_POOL_IN_PSRAM 1 |
| #define | PC_SSH_ZLIB_IN_PSRAM 1 |
| #define | MAX_TLS_CONNS 6 |
| #define | PC_H2_MAX_STREAMS 16 |
| #define | PC_H3_MAX_STREAMS 16 |
| #define | PC_EDGE_CACHE_SLOTS 16 |
| #define | PC_EDGE_BODY_MAX 8192 |
8 MB PSRAM profile - scale the RAM-backed pools up past the chip's internal SRAM.
Included before the chip profile, so these win for the memory-bound sizes. Note: growing the L1 slot count only pays off once the cache actually lives in PSRAM; until an edge-cache PSRAM-resident placement lands, the internal DRAM budget still bounds these, so the bumps here stay conservative. #ifndef-guarded, so your -D overrides still win.
Definition in file 8mbpsram.h.
| #define PC_TLS_ARENA_IN_PSRAM 1 |
Definition at line 19 of file 8mbpsram.h.
| #define PC_H2_POOL_IN_PSRAM 1 |
Definition at line 22 of file 8mbpsram.h.
| #define PC_SSH_ZLIB_IN_PSRAM 1 |
Definition at line 25 of file 8mbpsram.h.
| #define MAX_TLS_CONNS 6 |
Definition at line 28 of file 8mbpsram.h.
| #define PC_H2_MAX_STREAMS 16 |
Definition at line 31 of file 8mbpsram.h.
| #define PC_H3_MAX_STREAMS 16 |
Definition at line 34 of file 8mbpsram.h.
| #define PC_EDGE_CACHE_SLOTS 16 |
Definition at line 37 of file 8mbpsram.h.
| #define PC_EDGE_BODY_MAX 8192 |
Definition at line 40 of file 8mbpsram.h.