DeterministicESPAsyncWebServer v6.28.0
Zero-allocation, bounded-execution async HTTP server for ESP32
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interbus.h File Reference

INTERBUS summation-frame fieldbus codec (DETWS_ENABLE_INTERBUS). More...

#include "ServerConfig.h"
#include <stddef.h>
#include <stdint.h>

Go to the source code of this file.

Detailed Description

INTERBUS summation-frame fieldbus codec (DETWS_ENABLE_INTERBUS).

INTERBUS (Phoenix Contact) is a ring fieldbus with a distinctive summation frame: instead of addressing each device, one frame circulates the whole ring and every device is a shift-register slice of it - the master clocks the frame around, each device reads its input slot and writes its output slot as the bits pass through. A cycle frame is:

[loopback word : 2][device data words...][FCS : 2 (CRC-16/CCITT)]

The loopback word (0xFFFF -> 0x0000) detects the ring is closed; each device slice is a fixed number of 16-bit words (its process image). This codec assembles the summation frame from a list of per-device word slices and disassembles a received frame back into those slices, plus the CRC. The physical ring (the shift-register clocking) is hardware-gated; this is the summation-frame + process-image layer. Pure, zero heap, no stdlib, host-testable.

Definition in file interbus.h.