DeterministicESPAsyncWebServer v6.28.0
Zero-allocation, bounded-execution async HTTP server for ESP32
Loading...
Searching...
No Matches
interbus.h
Go to the documentation of this file.
1// Copyright (C) 2026 Douglas Quigg (dstroy0) <dquigg123@gmail.com>
2// SPDX-License-Identifier: AGPL-3.0-or-later
3
4/**
5 * @file interbus.h
6 * @brief INTERBUS summation-frame fieldbus codec (DETWS_ENABLE_INTERBUS).
7 *
8 * INTERBUS (Phoenix Contact) is a ring fieldbus with a distinctive **summation frame**: instead of
9 * addressing each device, one frame circulates the whole ring and every device is a shift-register slice
10 * of it - the master clocks the frame around, each device reads its input slot and writes its output
11 * slot as the bits pass through. A cycle frame is:
12 *
13 * [loopback word : 2][device data words...][FCS : 2 (CRC-16/CCITT)]
14 *
15 * The loopback word (0xFFFF -> 0x0000) detects the ring is closed; each device slice is a fixed number of
16 * 16-bit words (its process image). This codec assembles the summation frame from a list of per-device
17 * word slices and disassembles a received frame back into those slices, plus the CRC. The physical ring
18 * (the shift-register clocking) is hardware-gated; this is the summation-frame + process-image layer.
19 * Pure, zero heap, no stdlib, host-testable.
20 */
21
22#ifndef DETERMINISTICESPASYNCWEBSERVER_INTERBUS_H
23#define DETERMINISTICESPASYNCWEBSERVER_INTERBUS_H
24
25#include "ServerConfig.h"
26#include <stddef.h>
27#include <stdint.h>
28
29#if DETWS_ENABLE_INTERBUS
30
31/** @brief the loopback word that opens a summation frame. */
32static constexpr uint16_t INTERBUS_LOOPBACK = 0xFFFF;
33
34/** @brief CRC-16/CCITT-FALSE (the INTERBUS FCS) over @p len bytes. */
35uint16_t detws_interbus_fcs(const uint8_t *bytes, size_t len);
36
37/**
38 * @brief Assemble a summation frame from per-device 16-bit word slices.
39 * @param words the concatenated device data words (big-endian on the wire).
40 * @param word_count number of 16-bit words across all device slices.
41 * @param out output byte buffer.
42 * @param cap its capacity.
43 * @return the frame length (2 + word_count*2 + 2), or 0 on overflow.
44 *
45 * Layout: loopback(2) + words(word_count*2, big-endian) + FCS(2). The FCS covers loopback + words.
46 */
47size_t detws_interbus_build(const uint16_t *words, size_t word_count, uint8_t *out, size_t cap);
48
49/**
50 * @brief Disassemble a summation frame back into device data words.
51 * @param frame the received frame.
52 * @param len its length.
53 * @param out_words buffer for the decoded 16-bit words.
54 * @param max_words its capacity (in words).
55 * @param out_count set to the number of words decoded.
56 * @return true if the loopback word + FCS are valid and the words fit @p max_words.
57 */
58bool detws_interbus_parse(const uint8_t *frame, size_t len, uint16_t *out_words, size_t max_words, size_t *out_count);
59
60#endif // DETWS_ENABLE_INTERBUS
61#endif // DETERMINISTICESPASYNCWEBSERVER_INTERBUS_H
User-facing configuration for DeterministicESPAsyncWebServer.