DeterministicESPAsyncWebServer
v6.27.1
Zero-allocation, bounded-execution async HTTP server for ESP32
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iface_bridge_hw.h
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// Copyright (C) 2026 Douglas Quigg (dstroy0) <dquigg123@gmail.com>
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// SPDX-License-Identifier: AGPL-3.0-or-later
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/**
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* @file iface_bridge_hw.h
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* @brief ESP32 glue for the interface bridge (DETWS_ENABLE_IFACE_BRIDGE): the PROTO_BRIDGE listener that
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* wires an accepted connection to a UART / SPI / I2C endpoint, plus the bus I/O.
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*
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* The pure core (iface_bridge.h) owns the rule table and the transaction frame codec; this file owns the
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* side that touches hardware: a ConnProto::PROTO_BRIDGE connection handler and the Serial / SPI / Wire
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* transfers. Layered exactly like services/relay - the app opens the listener, then publishes a target:
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*
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* @code
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* int32_t li = server.listen(2323, ConnProto::PROTO_BRIDGE); // front port 2323
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* BridgeTarget uart = {BridgeBus::uart, BridgeMode::stream, 1, 0, 115200, 0, 0};
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* det_bridge_publish((uint8_t)li, 2323, BridgeProto::tcp, &uart); // -> UART1 raw passthrough
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*
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* int32_t ls = server.listen(2324, ConnProto::PROTO_BRIDGE);
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* BridgeTarget spi = {BridgeBus::spi, BridgeMode::transaction, 0, 5, 1000000, 0, 0}; // 5 = CS gpio
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* det_bridge_publish((uint8_t)ls, 2324, BridgeProto::tcp, &spi); // -> SPI write-then-read frames
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* @endcode
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*
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* Security: a published port is a direct pipe to the bus. Only expose it on a trusted interface / behind
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* an upstream ACL; there is no authentication at this layer.
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*
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* @author Douglas Quigg (dstroy0)
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* @date 2026
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*/
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#ifndef DETERMINISTICESPASYNCWEBSERVER_IFACE_BRIDGE_HW_H
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#define DETERMINISTICESPASYNCWEBSERVER_IFACE_BRIDGE_HW_H
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#include "
ServerConfig.h
"
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#if DETWS_ENABLE_IFACE_BRIDGE
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#include "
services/iface_bridge/iface_bridge.h
"
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#include <stdint.h>
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/**
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* @brief Bind a PROTO_BRIDGE listener to a hardware target and install the handler (first call).
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*
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* Registers the rule in the pure table (bridge_map), records the listener_id -> rule binding used to
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* dispatch accepted connections, and brings up the bus (Serial.begin / SPI CS pin / Wire).
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*
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* @param listener_id the id returned by `server.listen(port, ConnProto::PROTO_BRIDGE)`.
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* @param port the same listen port (the dispatch key into the rule table).
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* @param proto TCP or UDP (matches how the listener was opened).
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* @param target the UART / SPI / I2C endpoint (copied into the rule).
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* @return true; false if @p target is null, the rule table is full, or the port+proto is already bound.
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*/
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bool
det_bridge_publish(uint8_t listener_id, uint16_t port, BridgeProto proto,
const
BridgeTarget *target);
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/** @brief Clear all listener bindings and rules (start from empty). */
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void
det_bridge_listener_reset(
void
);
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#endif
// DETWS_ENABLE_IFACE_BRIDGE
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#endif
// DETERMINISTICESPASYNCWEBSERVER_IFACE_BRIDGE_HW_H
ServerConfig.h
User-facing configuration for DeterministicESPAsyncWebServer.
iface_bridge.h
User-defined address:port -> hardware-bus translation (DETWS_ENABLE_IFACE_BRIDGE).
src
services
iface_bridge
iface_bridge_hw.h
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