ProtoCore v0.0.2
Deterministic, zero-heap network stack for embedded targets
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h4_defaults.h
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1// Copyright (C) 2026 Douglas Quigg (dstroy0) <dquigg123@gmail.com>
2// SPDX-License-Identifier: AGPL-3.0-or-later
3
4/**
5 * @file h4_defaults.h
6 * @brief ESP32-H4 die profile (PREVIEW) - dual RISC-V, 384 KB SRAM, BLE 5.4 + 802.15.4, no Wi-Fi.
7 *
8 * PREVIEW (target present since ESP-IDF v6.0, not a stable release - re-verify at release). The
9 * dual-core H2 successor with more RAM and PSRAM support, for wireless-audio / Matter. No Wi-Fi;
10 * BLE 5.4 + 802.15.4. Crypto HW is the odd one among the H-parts: AES, SHA, ECC, ECDSA, HMAC -
11 * but NO RSA/MPI and NO DS. Stays at the floor (no Wi-Fi, 384 KB). classic_defaults.h is the sizing
12 * floor; every macro is `#ifndef`-guarded.
13 */
14
15#ifndef PROTOCORE_H4_DEFAULTS_H
16#define PROTOCORE_H4_DEFAULTS_H
17
18// --- HW crypto accelerators (no RSA/MPI, no DS) ---
19#ifndef PC_HW_AES
20#define PC_HW_AES 1
21#endif
22#ifndef PC_HW_SHA
23#define PC_HW_SHA 1
24#endif
25#ifndef PC_HW_RSA
26#define PC_HW_RSA 0
27#endif
28#ifndef PC_HW_ECC
29#define PC_HW_ECC 1
30#endif
31#ifndef PC_HW_ECDSA
32#define PC_HW_ECDSA 1
33#endif
34#ifndef PC_HW_HMAC
35#define PC_HW_HMAC 1
36#endif
37#ifndef PC_HW_DS
38#define PC_HW_DS 0
39#endif
40
41// --- Sizing (bump over the floor; dual core, 384 KB SRAM, no Wi-Fi) ---
42// Internal-SRAM-budget values (no PSRAM assumed); a PSRAM-size profile, included first, scales the
43// RAM-backed buffers further and moves the big TLS / HTTP-2 pools off-chip.
44
45// Connection pools + per-connection buffers.
46#ifndef MAX_CONNS
47#define MAX_CONNS 12
48#endif
49#ifndef RX_BUF_SIZE
50#define RX_BUF_SIZE 1536
51#endif
52#ifndef PC_SCRATCH_ARENA_SIZE
53#define PC_SCRATCH_ARENA_SIZE 10240
54#endif
55#ifndef PC_CLIENT_RX_BUF
56#define PC_CLIENT_RX_BUF 8192
57#endif
58
59// HTTP surface.
60#ifndef MAX_ROUTES
61#define MAX_ROUTES 24
62#endif
63#ifndef MAX_HEADERS
64#define MAX_HEADERS 12
65#endif
66#ifndef BODY_BUF_SIZE
67#define BODY_BUF_SIZE 512
68#endif
69
70// WebSocket / SSE fan-out.
71#ifndef MAX_WS_CONNS
72#define MAX_WS_CONNS 4
73#endif
74#ifndef MAX_SSE_CONNS
75#define MAX_SSE_CONNS 4
76#endif
77
78// TLS: one handshake on the internal-DRAM arena; a PSRAM profile raises this with the arena in PSRAM.
79#ifndef MAX_TLS_CONNS
80#define MAX_TLS_CONNS 1
81#endif
82
83// SSH server + reverse-SSH client.
84#ifndef MAX_SSH_CONNS
85#define MAX_SSH_CONNS 2
86#endif
87#ifndef PC_SSH_MAX_CHANNELS
88#define PC_SSH_MAX_CHANNELS 4
89#endif
90#ifndef PC_SSH_CLIENT_MAX_CHANNELS
91#define PC_SSH_CLIENT_MAX_CHANNELS 4
92#endif
93
94// Edge cache + mesh (RAM-backed L1).
95#ifndef PC_EDGE_CACHE_SLOTS
96#define PC_EDGE_CACHE_SLOTS 6
97#endif
98#ifndef PC_EDGE_BODY_MAX
99#define PC_EDGE_BODY_MAX 4096
100#endif
101#ifndef PC_EDGE_FETCH_SLOTS
102#define PC_EDGE_FETCH_SLOTS 3
103#endif
104#ifndef PC_MESH_MAX_PEERS
105#define PC_MESH_MAX_PEERS 6
106#endif
107#ifndef PC_MESH_MAX_CONNS
108#define PC_MESH_MAX_CONNS 1
109#endif
110
111#include "../classic_defaults.h"
112#endif // PROTOCORE_H4_DEFAULTS_H